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filterless, high efficiency, mono 3 w class-d audio amplifier SSM2315 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008 analog devices, inc. all rights reserved. features filterless class-d amplifier with - modulation no sync necessary when using multiple class-d amplifiers from analog devices, inc. 3 w into 3 load and 1.4 w into 8 load at 5.0 v supply with <1% total harmonic distortion (thd + n) 93% efficiency at 5.0 v, 1.4 w into 8 speaker >103 db signal-to-noise ratio (snr) single-supply operation from 2.5 v to 5.5 v 20 na ultralow shutdown current short-circuit and thermal protection available in 9-ball, 1.5 mm 1.5 mm wlcsp pop-and-click suppression built-in resistors reduce board component count default fixed 6 db or user adjustable gain setting applications mobile phones mp3 players portable gaming portable electronics educational toys general description the SSM2315 is a fully integrated, high efficiency, class-d audio amplifier. it is designed to maximize performance for mobile phone applications. the application circuit requires a minimum of external components and operates from a single 2.5 v to 5.5 v supply. it is capable of delivering 3 w of continuous output power with <1% thd + n driving a 3 load from a 5.0 v supply. the SSM2315 features a high efficiency, low noise modulation scheme that requires no external lc output filters. the modulation continues to provide high efficiency even at low output power. it operates with 93% efficiency at 1.4 w into 8 or 85% efficiency at 3 w into 3 from a 5.0 v supply and has an snr of >103 db. spread-spectrum pulse density modulation is used to provide lower emi-radiated emissions compared with other class-d architectures. the SSM2315 has a micropower shutdown mode with a typical shutdown current of 20 na. shutdown is enabled by applying a logic low to the sd pin. the device also includes pop-and-click suppression circuitry. this suppression circuitry minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation. the fully differential input of the SSM2315 provides excellent rejection of common-mode noise on the input. input coupling capacitors can be omitted if the dc input common-mode voltage is approximately v dd /2. the default gain of the SSM2315 is 6 db, but users can reduce the gain by using a pair of external resistors (see the gain section). the SSM2315 is specified over the industrial temperature range of ?40 c to +85 c. it has built-in thermal shutdown and output short-circuit protection. it is available in a 9-ball, 1.5 mm 1.5 mm wafer level chip scale package (wlcsp). functional block diagram shutdown 0.1f vdd pop/click suppression out+ out? in+ vbatt 2.5v to 5.5v in? modulator ( - ) gnd 10f 47nf* *input caps are optional if input dc common-mode voltage is approximately v dd /2. 47nf* sd audio in? audio in+ SSM2315 80k ? 160k ? 160k ? 80k ? fet driver bias internal oscillator 0 6857-001 figure 1.
SSM2315 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 4 ? thermal resistance ...................................................................... 4 ? esd caution .................................................................................. 4 ? pin configuration and function descriptions ............................. 5 ? typical performance characteristics ............................................. 6 ? typical application circuits ......................................................... 11 ? theory of operation ...................................................................... 12 ? overview ..................................................................................... 12 ? gain .............................................................................................. 12 ? pop-and-click suppression ...................................................... 12 ? output modulation description .............................................. 12 ? layout .......................................................................................... 13 ? input capacitor selection .......................................................... 13 ? proper power supply decoupling ............................................ 13 ? outline dimensions ....................................................................... 14 ? ordering guide .......................................................................... 14 ? revision history 8/08rev. 0 to rev. a changes to efficiency and total harmonic distortion + noise parameters ....................................................... 3 changes to ordering guide .......................................................... 14 2/08revision 0: initial version
SSM2315 rev. a | page 3 of 16 specifications v dd = 5.0 v, t a = 25 o c, r l = 8 + 33 h, unless otherwise noted. table 1. parameter symbol conditions 1 min typ max unit device characteristics output power p o r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.48 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.75 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.84 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.94 w r l = 4 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 2.72 w r l = 4 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 1.38 w r l = 4 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 3.40 2 w r l = 4 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 1.72 w r l = 3 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 3.43 w r l = 3 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 1.72 w r l = 3 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 4.28 2 w r l = 3 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 2.14 w efficiency p o = 1.4 w, r l = 8 + 33 h, v dd = 5.0 v 93 % total harmonic distortion + noise thd + n p o = 1 w, r l = 8 + 33 h, f = 1 khz, v dd = 5.0 v 0.004 % p o = 0.5 w, r l = 8 + 33 h, f = 1 khz, v dd = 3.6 v 0.004 % input common-mode voltage range v cm 1.0 v dd ? 1.0 v common-mode rejection ratio cmrr gsm v cm = 2.5 v 100 mv at 217 hz, output referred 55 db average switching frequency f sw 280 khz differential output offset voltage v oos gain = 6 db 2.0 mv power supply supply voltage range v dd guaranteed from psrr test 2.5 5.5 v power supply rejection ratio psrr v dd = 2.5 v to 5.0 v, dc input floating 70 85 db psrr gsm v ripple = 100 mv at 217 hz, inputs ac gnd, c in = 0.1 f 60 db supply current i sy v in = 0 v, no load, v dd = 5.0 v 3.2 ma v in = 0 v, no load, v dd = 3.6 v 2.8 ma v in = 0 v, no load, v dd = 2.5 v 2.4 ma v in = 0 v, load = 8 ?? + 33 h, v dd = 5.0 v 3.3 ma v in = 0 v, load = 8 ?? + 33 h, v dd = 3.6 v 2.9 ma v in = 0 v, load = 8 ?? + 33 h, v dd = 2.5 v 2.4 ma shutdown current i sd sd = gnd 20 na gain control closed-loop gain gain 6 db differential input impedance z in sd = v dd 80 k shutdown control input voltage high v ih i sy 1 ma 1.2 v input voltage low v il i sy 300 na 0.5 v turn-on time t wu sd rising edge from gnd to v dd 7 ms turn-off time t sd sd falling edge from v dd to gnd 5 s output impedance z out sd = gnd >100 k noise performance output voltage noise e n v dd = 3.6 v, f = 20 hz to 20 khz, inputs are ac-grounded, gain = 6 db, a-weighted 21 v rms signal-to-noise ratio snr p o = 1.4 w, r l = 8 103 db 1 note that although the SSM2315 has good audi o quality above 3 w, continuous output powe r beyond 3 w must be avoided due to dev ice packaging limitations. 2 this value represents measure d performance; packaging limitat ions must not be exceeded.
SSM2315 rev. a | page 4 of 16 absolute maximum ratings absolute maximum ratings apply at 25c, unless otherwise noted. table 2. parameter rating supply voltage 6 v input voltage v dd common-mode input voltage v dd continuous output power 3 w storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +165c lead temperature (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type pcb ja jb unit 9-ball, 1.5 mm 1.5 mm wlcsp 1s0p 162 39 c/w 2s0p 76 21 c/w esd caution
SSM2315 rev. a | page 5 of 16 pin configuration and fu nction descriptions SSM2315 top view ball side down (not to scale) ball a1 corner a 321 b c 06857-002 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 2c sd shutdown input. active low digital input. 2a gnd ground. 1a in+ noninverting input. 1c in? inverting input. 3c out+ noninverting output. 1b vdd power supply. 3b gnd ground. 3a out? inverting output. 2b pvdd power supply.
SSM2315 rev. a | page 6 of 16 typical performance characteristics 100 10 1 0.1 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 thd + n (%) output power (w) r l = 8 ? + 33h gain = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06857-003 figure 3. thd + n vs. output power, r l = 8 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 thd + n (%) output power (w) r l = 4 ? + 33h gain = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06857-004 figure 4. thd + n vs. output power, r l = 4 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 thd + n (%) output power (w) r l = 3 ? + 33h gain = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06857-005 figure 5. thd + n vs. output power, r l = 3 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.0001 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 5v gain = 6db r l = 8 ? + 33h 1w 0.5w 0.25w 06857-006 figure 6. thd + n vs. frequency, v dd = 5 v, r l = 8 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.0001 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 5v gain = 6db r l = 4 ? + 33h 2w 1w 0.5w 06857-007 figure 7. thd + n vs. frequency, v dd = 5 v, r l = 4 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.0001 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 5v gain = 6db r l = 3 ? + 33h 0.5w 0.75w 3w 06857-008 figure 8. thd + n vs. frequency, v dd = 5 v, r l = 3 + 33 h, gain = 6 db
SSM2315 rev. a | page 7 of 16 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 3.6v gain = 6db r l = 8 ? + 33h 0.125w 0.5w 0.25w 06857-009 figure 9. thd + n vs. frequency, v dd = 3.6 v, r l = 8 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 3.6v gain = 6db r l = 4 ? + 33h 0.25w 0.5w 1w 06857-010 figure 10. thd + n vs. frequency, v dd = 3.6 v, r l = 4 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 3.6v gain = 6db r l = 3 ? + 33h 0.75w 0.38w 1.5w 06857-011 figure 11. thd + n vs. frequency, v dd = 3.6 v, r l = 3 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 2.5v gain = 6db r l = 8 ? + 33h 0.25w 0.125w 0.63w 06857-012 figure 12. thd + n vs. frequency, v dd = 2.5 v, r l = 8 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 2.5v gain = 6db r l = 4 ? + 33h 0.5w 0.125w 0.25w 06857-013 figure 13. thd + n vs. frequency, v dd = 2.5 v, r l = 4 + 33 h, gain = 6 db 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k thd + n (%) frequency (hz) v dd = 2.5v gain = 6db r l = 3 ? + 33h 0.375w 0.188w 0.75w 06857-014 figure 14. thd + n vs. frequency, v dd = 2.5 v, r l = 3 + 33 h, gain = 6 db
SSM2315 rev. a | page 8 of 16 4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7 2.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 supply current (ma) supply voltage (v) r l = 3 ? + 33h r l = 4 ? + 33h no load 06857-015 figure 15. supply current vs. supply voltage 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2.5 3.0 3.5 4.0 4.5 5.0 output power (w) supply voltage (v) 10% 1% frequency = 1khz gain = 6db r l = 8 ? + 33h 06857-016 figure 16. maximum output power vs. supply voltage, r l = 8 + 33 h, gain = 6 db 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5 3.0 3.5 4.0 4.5 5.0 output power (w) supply voltage (v) 10% 1% frequency = 1khz gain = 6db r l = 4 ? + 33h 06857-017 do not exceed 3w continuous output power figure 17. maximum output power vs. supply voltage, r l = 4 + 33 h, gain = 6 db 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5 3.0 3.5 4.0 4.5 5.0 output power (w) supply voltage (v) 10% 1% frequency = 1khz gain = 6db r l = 3 ? + 33h 06857-018 do not exceed 3w continuous output power figure 18. maximum output power vs. supply voltage, r l = 3 + 33 h, gain = 6 db 100 90 80 70 60 50 40 30 20 10 0 01.8 1.61.41.2 1.0 0.80.60.40.2 efficiency (%) output power (w) r l = 8 ? + 33h v dd = 2.5v v dd = 3.6v v dd = 5v 06857-019 figure 19. efficiency vs. output power, r l = 8 + 33 h 100 90 80 70 60 50 40 30 20 10 0 03.2 3.02.82.62.42.22.01.81.61.41.21.00.80.60.40.2 efficiency (%) output power (w) r l = 4 ? + 33h v dd = 2.5v v dd = 3.6v v dd = 5v 06857-020 figure 20. efficiency vs. output power, r l = 4 + 33 h
SSM2315 rev. a | page 9 of 16 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 01.8 1.61.41.2 1.0 0.80.60.40.2 power dissipation (w) output power (w) v dd = 5v r l = 8 ? + 33h 06857-021 figure 21. power dissipation vs. output power, r l = 8 + 33 h at v dd = 5.0 v 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 03.0 2.5 2.0 1.5 1.0 0.5 power dissipation (w) output power (w) v dd = 5v r l = 4 ? + 33h 06857-022 figure 22. power dissipation vs. output power, r l = 4 + 33 h at v dd = 5.0 v 0.09 0.07 0.08 0.06 0.05 0.04 0.03 0.02 0.01 0 00.9 0.7 0.5 0.8 0.6 0.40.30.20.1 power dissipation (w) output power (w) v dd = 3.6v r l = 8 ? + 33h 06857-023 figure 23. power dissipation vs. output power, r l = 8 + 33 h at v dd = 3.6 v 0.25 0.20 0.15 0.10 0.05 0 01 . 6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 power dissipation (w) output power (w) v dd = 3.6v r l = 4 ? + 33h 06857-024 figure 24. power dissipation vs. output power, r l = 4 + 33 h at v dd = 3.6 v 400 350 300 250 200 150 100 50 0 01.8 1.61.41.2 1.0 0.80.60.40.2 supply current (ma) output power (w) r l = 8 ? + 33h v dd = 2.5v v dd = 3.6v v dd = 5v 06857-025 figure 25. supply current vs. output power, r l = 8 + 33 h 800 700 600 500 400 300 200 100 0 03.0 2.82.62.42.22.01.81.61.41.21.00.80.60.40.2 supply current (ma) output power (w) r l = 4 ? + 33h v dd = 2.5v v dd = 3.6v v dd = 5v 06857-026 figure 26. supply current vs. output power, r l = 4 + 33 h
SSM2315 rev. a | page 10 of 16 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100k 10k 1k 100 psrr (db) frequency (hz) 06857-027 figure 27. power supply rejectio n ratio (psrr) vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100k 10k 1k 100 cmrr (db) frequency (hz) 06857-028 figure 28. common-mode rejection ratio (cmrr) vs. frequency 8 7 6 5 4 3 2 1 0 ?1 ?2 ?2 20181614 12 10 86420 voltage (v) time (ms) output sd input 06857-029 figure 29. turn-on response 8 7 6 5 4 3 2 1 0 ?1 ?2 ?90 907050 30 10?10?30?50 ?70 voltage (v) time (s) sd input output 06857-030 figure 30. turn-off response
SSM2315 rev. a | page 11 of 16 typical application circuits shutdown 0.1f vdd pop/click suppression out+ out? in+ vbatt 2.5v to 5.5v in? modulator ( - ) gnd 10f 47nf* 47nf* *input caps are optional if input dc common-mode voltage is approximately v dd /2. external gain settings = 160k ? /(80k ? + r ext ) sd a udio in? a udio in+ SSM2315 80k? 160k ? 160k ? 80k? r ext r ext fet driver bias internal oscillator 0 6857-031 figure 31. differential input configuration, user-adjustable gain shutdown 0.1f vdd pop/click suppression out+ out? vbatt 2.5v to 5.5v modulator ( - ) gnd 10f 47nf 47nf sd SSM2315 80k? 160k ? 160k ? 80k? r ext r ext fet driver bias internal oscillator external gain settings = 160k ? /(80k ? + r ext ) in+ in? audio in+ 0 6857-032 figure 32. single-ended input conf iguration, user-adjustable gain
SSM2315 rev. a | page 12 of 16 theory of operation overview the SSM2315 mono class-d audio amplifier features a filterless modulation scheme that greatly reduces the external component count, conserving board space and, thus, reducing systems cost. the SSM2315 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square wave output. most class-d amplifiers use some variation of pulse-width modulation (pwm), but the SSM2315 uses a - modulation to determine the switching pattern of the output devices, resulting in a number of important benefits. - modulators do not produce a sharp peak with many harmonics in the am frequency band, as pulse-width modulators often do. - modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing emi emission that may otherwise be radiated by speakers and long cable traces. the SSM2315 does not require external emi filtering for twisted speaker cable lengths shorter than 10 cm. due to the inherent spread spectrum nature of - modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2315 amplifiers. the SSM2315 also offers protection circuits for overcurrent and temperature protection. gain the SSM2315 has a default gain of 6 db that can be reduced by using a pair of external resistors with a value calculated as follows: external gain settings = 160 k/(80 k + r ext ) pop-and-click suppression voltage transients at the output of audio amplifiers may occur when shutdown is activated or deactivated. voltage transients as low as 10 mv can be heard as an audio pop in the speaker. clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. such transients may be generated when the amplifier system changes its operating mode. for example, the following may be sources of audible transients: system power-up and power-down, mute and unmute, input source change, and sample rate change. the SSM2315 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation. output modulation description the SSM2315 uses three-level, - output modulation. each output can swing from gnd to vdd and vice versa. ideally, when no input signal is present, the output differential voltage is 0 v because there is no need to generate a pulse. in a real world situation, there are always noise sources present. due to this constant presence of noise, a differential pulse is generated, when required, in response to this stimulus. a small amount of current flows into the inductive load when the differen- tial pulse is generated. however, most of the time, output differential voltage is 0 v, due to the analog devices patented, three-level, - output modulation. this feature ensures that the current flowing through the inductive load is small. when the user wants to send an input signal, an output pulse is generated to follow the input voltage. the differential pulse density is increased by raising the input signal level. figure 33 depicts three-level, - output modulation with and without input stimulus. output > 0v +5v 0v out+ +5v 0v out? +5v 0v vout output < 0v +5v 0v out+ +5v 0v out? 0v ?5v vout output = 0v out+ +5v 0v +5v 0v out? +5v ?5v 0v vout 06857-033 figure 33. three-level, - output modulation with and without input stimulus
SSM2315 rev. a | page 13 of 16 layout as output power continues to increase, care must be taken to lay out pcb traces and wires properly among the amplifier, load, and power supply. a good practice is to use short, wide pcb tracks to decrease voltage drops and to minimize inductance. ensure that track widths are at least 200 mil for every inch of track length for lowest dcr, and use 1 oz or 2 oz of copper pcb traces to further reduce ir drops and inductance. a poor layout increases voltage drops, consequently affecting efficiency. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. proper grounding guidelines help improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. to maintain high output swing and high peak output power, the pcb traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. it is also recommended that a large ground plane be used for minimum impedances. in addition, good pcb layouts isolate critical analog paths from sources of high interference. high frequency circuits (analog and digital) should be separated from low frequency circuits. properly designed multilayer printed circuit boards can reduce emi emission and increase immunity to the rf field by a factor of 10 or more, compared with double-sided boards. a multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted with signal crossover. if the system has separate analog and digital ground and power planes, the analog ground plane should be underneath the analog power plane. similarly, the digital ground plane should be underneath the digital power plane. there should be no overlap between analog and digital ground planes or analog and digital power planes. input capacitor selection the SSM2315 does not require input coupling capacitors if the input signal is biased from 1.0 v to v dd ? 1.0 v. input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed, or if a single-ended source is used. if high-pass filtering is needed at the input, the input capacitor and the input resistor of the SSM2315 form a high-pass filter whose corner frequency is determined by the following equation: f c = 1/(2 r in c in ) the input capacitor can significantly affect the performance of the circuit. not using input capacitors degrades both the output offset of the amplifier and the dc psrr performance. proper power supply decoupling to ensure high efficiency, low total harmonic distortion (thd), and high psrr, proper power supply decoupling is necessary. noise transients on the power supply lines are short-duration voltage spikes. although the actual switching frequency can range from 10 khz to 100 khz, these spikes can contain frequency components that extend into the hundreds of megahertz. the power supply input needs to be decoupled with a good quality, low esl, low esr capacitor, usually of around 4.7 f. this capacitor bypasses low frequency noises to the ground plane. for high frequency transients noises, use a 0.1 f capacitor as close as possible to the vdd pin of the device. placing the decoupling capacitor as close as possible to the SSM2315 helps maintain efficient performance.
SSM2315 rev. a | page 14 of 16 outline dimensions 101507-c 1.490 1.460 sq 1.430 0.350 0.320 0.290 0.655 0.600 0.545 bottom view (ball side up) top view (ball side down) a 123 b c 0.270 0.240 0.210 0.385 0.360 0.335 a1 ball corner seating plane 0.50 ball pitch figure 34. 9-ball wafer level chip scale package [wlcsp] (cp-9-2) dimensions shown in millimeters ordering guide model temperature range package desc ription package option branding SSM2315cbz-r2 1 ?40c to +85c 9-ball wafer level chip scale package [wlcsp] cb-9-2 y0p SSM2315cbz-reel 1 ?40c to +85c 9-ball wafer level chip scale package [wlcsp] cb-9-2 y0p SSM2315cbz-reel7 1 ?40c to +85c 9-ball wafer level chip scale package [wlcsp] cb-9-2 y0p SSM2315-evalz 1 evaluation board 1 z = rohs compliant part.
SSM2315 rev. a | page 15 of 16 notes
SSM2315 rev. a | page 16 of 16 notes ?2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06857-0-8/08(a)

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